hdl
v0.7.2HDL engineering: idiomatic VHDL-2008 and SystemVerilog IEEE 1800-2017 code review with synthesizability analysis
By Simon HeimlicherLicense: MIT1 GitHub starsUpdated last week
Directory evidence
- Runtimes
- Codex and Claude Code
- Parsed components
- 2 skill or MCP entries
- Source updated
- Sep 16, 2026
- Manifest status
- Canonical path parsed
The directory validates manifest shape and source location. It does not execute the plugin or provide a security endorsement. Review the indexing methodology →
Install hdl for Codex and Claude Code
claude plugin marketplace add IchenDEV/agent-plugin-mkt
claude plugin marketplace update agent-plugin-marketplace
claude plugin install hdl-3@agent-plugin-marketplacePaste and run these commands in a terminal with Claude Code. They add and refresh the PluginsMP catalog, then install this plugin.
Compatibility: the page URL and API slug “hdl-3” remain stable.
- Codex: Legacy selector
hdl-3@agent-plugin-marketplaceremains documented for migration; install from source for this runtime.
The installer fetches third-party code from the source repository shown on this page. This directory validates manifest structure and source location, but does not perform a security audit; review the manifest, components, and source before installing.
Codex has another source with the same manifest name. This directory does not invent numbered install aliases; use the publisher's catalog or inspect the source manually for that runtime.
Get the source manually
git clone https://github.com/outcomeeng/pluginsClone the source repository, then follow its setup instructions to add the plugin to a compatible client. The plugin root is src/plugins/hdl/.
Plugin files
├── .codex-plugin/plugin.json├── .claude-plugin/plugin.json├── skills/review-systemverilog/SKILL.md└── skills/review-vhdl/SKILL.md
Included Skills2
ALWAYS invoke this skill when reviewing SystemVerilog or Verilog code for idiomatic style, synthesizability, or best practices. NEVER review SystemVerilog or Verilog without this skill.
ALWAYS invoke this skill when reviewing VHDL code for idiomatic style, synthesizability, or best practices. NEVER review VHDL without this skill.
Plugin manifests2
{
"name": "hdl",
"version": "0.7.2",
"description": "HDL engineering: idiomatic VHDL-2008 and SystemVerilog IEEE 1800-2017 code review with synthesizability analysis",
"author": {
"name": "Simon Heimlicher",
"url": "https://github.com/outcomeeng"
},
"homepage": "https://github.com/outcomeeng/plugins",
"repository": "https://github.com/outcomeeng/plugins",
"license": "MIT",
"keywords": [
"vhdl",
"systemverilog",
"verilog",
"fpga",
"asic",
"hdl",
"synthesis"
],
"skills": "./skills/",
"interface": {
"displayName": "HDL Engineering",
"shortDescription": "Review VHDL and SystemVerilog designs",
"longDescription": "Hardware-description-language review workflows for idiomatic VHDL-2008 and SystemVerilog code.",
"developerName": "Outcome Engineering",
"category": "Developer Tools",
"capabilities": [
"Read",
"Write"
],
"websiteURL": "https://outcome.engineering"
}
}{
"name": "hdl",
"version": "0.7.2",
"description": "HDL engineering: idiomatic VHDL-2008 and SystemVerilog IEEE 1800-2017 code review with synthesizability analysis",
"author": {
"name": "Simon Heimlicher"
},
"repository": "https://github.com/outcomeeng/plugins",
"license": "MIT",
"keywords": [
"vhdl",
"systemverilog",
"verilog",
"fpga",
"asic",
"hdl",
"synthesis"
]
}For maintainers
If you maintain this plugin, link to this source-backed listing from your README so users can review its manifest and indexed components.
[hdl on Agent Plugins Marketplace](https://pluginsmp.com/plugins/hdl-3)