hdl

v0.7.2

HDL engineering: idiomatic VHDL-2008 and SystemVerilog IEEE 1800-2017 code review with synthesizability analysis

CodexClaude Code3 Skills

By Simon HeimlicherLicense: MIT1 GitHub starsUpdated last week

Directory evidence

Runtimes: Codex and Claude Code
Parsed components: 3 skill or MCP entries
Source updated: Sep 16, 2026
Manifest status: Canonical path parsed

The directory validates manifest shape and source location. It does not execute the plugin or provide a security endorsement. Review the indexing methodology →

Install hdl for Codex and Claude Code

Installs for the current user

codex plugin marketplace add IchenDEV/agent-plugin-mkt
codex plugin marketplace upgrade agent-plugin-marketplace
codex plugin add hdl@agent-plugin-marketplace

Paste and run these commands in a terminal with Codex. They add and refresh the PluginsMP catalog, then install this plugin.

The installer fetches third-party code from the source repository shown on this page. This directory validates manifest structure and source location, but does not perform a security audit; review the manifest, components, and source before installing.

Get the source manually

$ git clone https://github.com/outcomeeng/plugins

Clone the source repository, then follow its setup instructions to add the plugin to a compatible client. The plugin root is dist/claude/hdl/.

Plugin files

dist/claude/hdl/

├── .codex-plugin/plugin.json
├── .claude-plugin/plugin.json
├── skills/hdl-plugin/SKILL.md
├── skills/review-systemverilog/SKILL.md
└── skills/review-vhdl/SKILL.md

Included Skills3

hdl-pluginskills/hdl-plugin/SKILL.md

ALWAYS invoke this skill to operate the hdl plugin's own lifecycle — report its version and check or reconcile its agent-delivery footprint. Invoke it when this plugin's agents are missing from a session. NEVER commit marketplace-delivered agent definitions into a checkout.

review-systemverilogskills/review-systemverilog/SKILL.md

ALWAYS invoke this skill when reviewing SystemVerilog or Verilog code for idiomatic style, synthesizability, or best practices. NEVER review SystemVerilog or Verilog without this skill.

review-vhdlskills/review-vhdl/SKILL.md

ALWAYS invoke this skill when reviewing VHDL code for idiomatic style, synthesizability, or best practices. NEVER review VHDL without this skill.

Plugin manifests2

dist/claude/hdl/.codex-plugin/plugin.json

{
  "name": "hdl",
  "version": "0.7.2",
  "description": "HDL engineering: idiomatic VHDL-2008 and SystemVerilog IEEE 1800-2017 code review with synthesizability analysis",
  "author": {
    "name": "Simon Heimlicher",
    "url": "https://github.com/outcomeeng"
  },
  "homepage": "https://github.com/outcomeeng/plugins",
  "repository": "https://github.com/outcomeeng/plugins",
  "license": "MIT",
  "keywords": [
    "vhdl",
    "systemverilog",
    "verilog",
    "fpga",
    "asic",
    "hdl",
    "synthesis"
  ],
  "skills": "./skills/",
  "interface": {
    "displayName": "HDL Engineering",
    "shortDescription": "Review VHDL and SystemVerilog designs",
    "longDescription": "Hardware-description-language review workflows for idiomatic VHDL-2008 and SystemVerilog code.",
    "developerName": "Outcome Engineering",
    "category": "Developer Tools",
    "capabilities": [
      "Read",
      "Write"
    ],
    "websiteURL": "https://outcome.engineering"
  }
}

dist/claude/hdl/.claude-plugin/plugin.json

{
  "name": "hdl",
  "version": "0.7.2",
  "description": "HDL engineering: idiomatic VHDL-2008 and SystemVerilog IEEE 1800-2017 code review with synthesizability analysis",
  "author": {
    "name": "Simon Heimlicher"
  },
  "repository": "https://github.com/outcomeeng/plugins",
  "license": "MIT",
  "keywords": [
    "vhdl",
    "systemverilog",
    "verilog",
    "fpga",
    "asic",
    "hdl",
    "synthesis"
  ]
}